Capacitor Testing Provides Data for Possible Patent InfringementPost by: RJ Lee Group News
- 5:00PM May 15, 2013
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RJ Lee Group received several de-mounted multi-layer ceramic SMT capacitors for examination. The devices were involved in a possible patent infringement case dealing with device design and the electrical properties of the insulator material. Three of the devices were selected for a survey by scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS) analysis. The device dimensions, ceramic composition and metallization were evaluated during this examination. The initial capacitance of each device was measured prior to any destructive processing or sample preparation. All measured capacitance values were within approximately 5% of the average.
We prepared samples from the first two devices for longitudinal and transverse cross-sections that were produced by tripod polishing techniques. This approach provided a high level of accuracy for preparing precision sections. The third device was prepared to measure the contact capacitance of the device. This was accomplished by carefully polishing the sample to remove all internal metallized plates so that only the residual dielectric or insulating material remained between the solder connections. This required precise tripod polisher sectioning that was able to hold the plane of polish parallel to the plates. Capacitance readings were then taken between the contacts.
We provided morphological and compositional data as spectra and images acquired from the devices. Capacitance values for the respective devices were also reported for each of the specimens to enable the manufacturer to determine if patent infringement had occurred.